The present invention relates, in general, to the field of nonlinear integrated circuit (xe2x80x9cICxe2x80x9d) devices. More particularly, the present invention relates to a temperature stable, integrated circuit full wave level detector incorporating a single operational amplifier stage and which does not require full wave rectification of an alternating current (xe2x80x9cACxe2x80x9d) input signal or a comparator to detect the resultant signal level.
Conventional implementations of a full wave level detector utilize a pair of series coupled operational amplifiers to perform a full wave rectification of an input AC signal. Typical of such full wave rectification circuits are those described in Frederickson, T. M., Intuitive Op Amps, p. 213; Sheingold, D. H., Nonlinear Circuits Handbookpp. 132-134, Analog Devices, 1976; Mixed Signal Design Seminar, xe2x80x9cLinear and Non-Linear Analog Signal Processingxe2x80x9d, Analog Devices, 1991.
In a conventional full wave level detector, the output of such a full wave rectifier circuit is then applied to one input of a comparator which has its other input tied to a predetermined reference voltage level. As is well known, a comparator is a device that has two stable output states and in this instance is used to provide a predetermined signal output level when an input voltage from the full wave rectifier circuit has crossed a threshold voltage determined by the value of the reference voltage. While using two such operational amplifiers together with a single comparator provides full wave level detector functionality, the need for the initial full wave rectification step necessitates the use of an undesirably large number of circuit elements requiring the commitment of a concomitantly large on-chip die area in an integrated circuit implementation. Moreover, due to the functionality and design of such circuits, less than optimal temperature stability may be exhibited over at least a portion of the range of possible integrated circuit device operational temperatures.
A full wave level detector circuit is disclosed which does not require, as in prior art implementations, two operational amplifiers to perform a full wave rectification function on an input AC signal followed by a comparator to detect the resultant signal level. The full wave level detector of the present invention utilizes but a single amplifier in conjunction with some additional peripheral components resulting in a saving in valuable on-chip die area in an integrated circuit implementation while also exhibiting excellent temperature stability characteristics.
Particularly disclosed herein is a full wave level detector having an input node for receiving an input signal and an output node for providing a corresponding output signal. The detector comprises an amplifier coupled to receive the input signal through a first resistor (R1) on an input terminal thereof; first and second switching devices having control terminals thereof coupled to the input terminal of the amplifier and second (R2), third (R3) and fourth (R4) resistors coupled to an output terminal of the amplifier, with the second resistor being coupled to the input terminal of the amplifier and the third and fourth resistors being respectively coupled to a first current carrying terminal of the first and second switching devices. The detector further comprises a first current mirror having first and second legs thereof respectively coupling a second current carrying terminal of each of the first and second switching devices to a first supply voltage source, with the second current carrying terminal of the second switching device defining a circuit node. A second current mirror has first and second legs thereof, with the first leg thereof coupling a second supply voltage source to the circuit node while a third current mirror has first and second legs thereof respectively coupled through a fifth resistor (R5) to a reference voltage source and the second leg thereof coupled to the second leg of the second current mirror. An output driver couples the circuit node to the output node.